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V23814-U1306-M130
Parallel Optical Link: PAROLITM Tx AC, 1.6 Gbit/s
V23815-U1306-M130
Parallel Optical Link: PAROLITM Rx AC, 1.6 Gbit/s
Preliminary
Dimensions in (mm) inches
(58.1) 2.287 Reference point for case temperature measurement (center of fin width) (1.5) .059 A A--A (1.5) .059 (7 .5) .295 (14) .551
(.13) (6.8) .268 .005 (1.3 max) .051 max (13.5) 0.531 (22.7) .894 (0.27) 4xM2 .011 (7) .276 (33.89) 1.334 A
.118
(3)
(12.73) .501 (1.2) .047 (1.0) .039
(14.9) .587 (17 .705 .9)
.098
(2.5)
APPLICATIONS
Telecommunication
* Switching equipment * Access network
Data Communication
* * * *
Interframe (rack-to-rack) Intraframe (board-to-board) On board (optical backplane) Interface to SCI and HIPPI 6400 standards
Absolute Maximum Ratings Stress beyond the values stated below may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. Supply Voltage (VCC-VEE).................................... -0.3 V to 4.5 V Data/Control Input Levels (VIN)(1) ................ -0.5 V to VCC+0.5 V LVDS Input Differential Voltage (|VID|)(2) .............................. 2.0 V Operating Case Temperature (TCASE)(3) ............... 0C to 80C Storage Ambient Temperature (TSTG)................ -20C to 100C Operating Moisture ............................................... 20% to 85% Storage Moisture.................................................... 20% to 85% Soldering Conditions Temp/Time (TSOLD, tSOLD)(4) ....260C/10s ESD Resistance (all pins to V EE, human body model)(5) ...... 1 kV
Notes 1. At LVDS and LVCMOS inputs. 2. |VID|=|(input voltage of non-inverted input minus input voltage of inverted input)|. 3. Measured at case temperature reference point (see dimensional drawing). 4. Hot bar soldering. 5. To avoid electrostatic damage the handling precautions as for MOS devices must be taken into account.
FEATURES * Power supply 3.3 V * Low voltage differential signal electrical interface (LVDS) * 12 electrical data channels * Asynchronous, AC-coupled optical link * 12 optical data channels * Transmission data rate of 250-1600 Mbit/s per channel, total link data rate up to 19 Gbit/s * Transmission distance up to 200m * Transmitter: 840 nm VCSEL (Vertical Cavity Surface Emitting Laser) technology * Receiver: 840 nm PIN diode array * Fiber ribbon: 62.5 m graded index multimode fiber * MT based optical port * SMD technology * Transmitter: Class 1 FDA and Class 3A IEC laser safety compliant
Fiber Optics
SEPTEMBER 1999
DESCRIPTION PAROLI is a parallel optical link for high-speed data transmission. A complete PAROLI system consists of a transmitter module, a 12-channel fiber optic cable, and a receiver module. Transmitter V23814-U1306-M130 The transmitter module converts parallel electrical input signals via a laser driver and a Vertical Cavity Surface Emitting Laser (VCSEL) diode array into parallel optical output signals. All input data signals are Low Voltage Differential Signals (LVDS). The data rate is 250-1600 Mbit/s for each channel. Electrical input data should be DC balanced within 144 bits. The maximum time interval of consecutive 0's and 1's (run length) should not exceed 72 bits. This will ensure that the output jitter values given for the transmitter and receiver in this data sheet will be met. Otherwise, jitter values will be exceeded. A logic low level at -RESET switches all laser outputs off. During power-up -RESET must be used as a power-on reset which disables the laser driver and laser control until the power supply has reached a 3 V level. An additional Laser Active output is low if a laser fault is detected or -RESET is forced to low. All nondata signals have LVCMOS levels. Transmission delay of the PAROLI system is at a maximum 1 ns for the transmitter, 1 ns for the receiver and approximately 5 ns per meter for the fiber optic cable. Figure 1. Transmitter block diagram
Electrical Input 12 LVDS Input Stage 12 LE -LE laser enable Optical Output 12 Data
Laser Emission
Indication of laser aperture and beam
Laser safety design considerations To ensure laser safety for all input data patterns each channel is controlled internally and will be switched off if the laser safety limits are exceeded. An internal control unit switches the respective data channel output off if the input duty cycle permanently exceeds 57%. The alerter will not disable the channel below an input duty cycle of 57% under all circumstances. The minimum alerter response time is 1 s with a constant high input, i.e. in the input pattern the time interval of excessive high input (e.g. '1's in excess of a 57% duty cycle, consecutive or non-consecutive) must not exceed 1 s, otherwise the resptive channel will be switched off. The alerter switches the respective channel from off to on without the need of resetting the module. All of the channel alerters operate independently, i.e. an alert within a channel does not affect the other channels. To decrease the power consumption of the module unused channel inputs can be tied to high input level. In this way a portion of the supply current in this channel is triggered to shut down by the corresponding alerter. TECHNICAL DATA The electro-optical characteristics described in the following tables are valid only for use under the recommended operating conditions. Recommended Operating Conditions
Parameter Power Supply Voltage Noise on Power LVDS Input Voltage Range(6) LVDS Input Differential Voltage(3, 6) LVDS Input Skew(4) Supply(1) Symbol VCC NPS1 NPS2 VLVDSI |VID| tSPN 500 100 Min. 3.0 Max. 3.6 10 100 1900 1000 50 300 VCC 0.8 20 ns V ps Units V mV
Data In
Laser Driver
12
Laser Diode Array
Laser Control
-RESET
Laser Active
Noise on Power Supply(2)
LASER SAFETY The transmitter of the AC coupled Parallel Optical Link (PAROLI) is an FDA Class 1 laser product. It complies with FDA regulations 21 CFR 1040.10 and 1040.11. The transmitter is also an IEC Class 3A laser product as defined by IEC 825-1.To avoid possible exposure to hazardous levels of invisible laser radiation, do not exceed maximum ratings. The PAROLI module must be operated under the specified operating conditions (supply voltage between 3.0 V and 3.6 V, case temperature between 0C and 80C) under any circumstances to ensure laser safety.
Caution Do not stare into beam or view directly with optical instruments. The use of optical instruments with this product may lead to eye hazard.
Note Any modification of the module will be considered an act of "manufacturing," and will require, under law, recertification of the product under FDA (21 CFR 1040.10 (i)).
LVDS Input Rise/Fall Time(5) tR, tF 100 LVCMOS Input VLVCMOSIH 2.0 High Voltage LVCMOS Input Low Voltage VLVCMOSIL LVCMOS Input tR, tF Rise/Fall Time(7)
Notes Voltages refer to VEE=0 V.
VEE
1. Noise frequency is 1 kHz to 1 MHz. Voltage is peak-to-peak value. 2. Noise frequency is 1 MHz to 1 GHz. Voltage is peak-to-peak value. 3. |VID|=|(input voltage of non-inverted input minus input voltage of inverted input)|. 4. Skew between positive and negative inputs measured at 50% level. 5. 20%-80% level.
Fiber Optics 2
V23814/15-U1306-M130 Parallel Optical Link: PAROLITM Tx/Rx AC, 1.6 Gbit/s
6. Level diagram:
mV 1900 |VID| 500
Launched Average Power Launched Power Shutdown Center Wavelength Spectral Width (FWHM) Relative Intensity Noise
Time
PAVG PSD C RIN ER
-11.0
-6.0 -30.0
dBm
820
860 2 -116
nm dB/Hz dB
Extinction Ratio (dynamic)
Notes
5.0
7 Measured between 0.8 V and 2.0 V. .
Transmitter Electro-Optical Characteristics
Parameter Supply Current Power Consumption Data Rate per Channel(1) LVCMOS Output Voltage Low LVCMOS Output Voltage High LVCMOS Input Current High/Low LVCMOS Output Current High(2) LVCMOS Output Current Low(3) LVDS Differential Input Impedance(4) LVDS Input Differential Current
Notes 1. Electrical input data should be DC balanced within 144 bits. Maximum time interval of consecutive '0's and '1's (run length) should be 72 bits. 2. Source current. 3. Sink current. 4. LVDS Input Stage.
Optical parameters valid for each channel.
Symbol lCC P DR VLVCMOSOL
Min. Typ. 350 1.2 250
Max. Units 450 1.6 mA W
1. 20%-80% level. 2. With input channel-to-channel skew 0 ps and a maximum LVDS channel-to-channel average deviation and swing deviation of 5%.
Figure 2. Timing diagram
3.6 V 3.0 V VCC 2.0 V 0.8 V t3 Data data invalid t1 data valid t2
1600 MBit/ s 0.4 V V 500 0.5 4.0 A mA mA Parameter
VLVCMOSOH 2.5 ILVCMOSI ILVCMOSOH ILVCMOSOL RIN |II| 80 -500
-RESET
Symbol t1 t2 t3
Min.
Max. 100 50
Units ms s s
120 5.0
mA
-RESET on Delay Time -RESET off Delay Time -RESET Low
Note
Duration(1)
10
1. Only when not used as power on reset. At any failure recovery, -RESET must be brought to low level for at least t3.
Transmitter Pin Description
Pin# 1
VCC 14 K Rin/2 Rin/2 C 8K 1.2 V 0.2 V
Pin Name VCC t.b.l.o.
Level/Logic
Description Power supply voltage of laser driver to be left open
Data In P
2 3 4 5 6
Data In N
LA
LVCMOS Out
Laser Active High=normal operation Low=laser fault or -RESET low Ground Ground to be left open to be left open Ground Ground
7 Parameter Optical Rise Time(1) Optical Fall Time(1) Random Jitter (14) Deterministic Jitter Symbol tR tF JR JD 0.23 0.20 75 ps UI Min. Max. 400 Units ps 8 9 10 11 12 13 14
Fiber Optics 3
VEE VEE t.b.l.o. t.b.l.o. VEE VEE DI01N DI01P LVDS In LVDS In
Channel-to-channel skew(2) tCSK
Data Input #1, inverted Data Input #1, non- inverted
V23814/15-U1306-M130 Parallel Optical Link: PAROLITM Tx/Rx AC, 1.6 Gbit/s
Pin# 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
Pin Name VEE VEE DI02N DI02P VEE VEE DI03N DI03P VEE VEE t.b.l.o. DI04N DI04P VEE DI05N DI05P VEE VEE DI06N DI06P VEE VEE DI07N DI07P VEE VEE DI08N DI08P VEE VEE VEE DI09N DI09P t.b.l.o. VEE VEE DI10N DI10P VEE VEE DI11N DI11P VEE VEE DI12N DI12P
Level/Logic
Description Ground Ground
Pin# 61 62 63 64
Pin Name VEE VEE t.b.l.o. -RESET
Level/Logic
Description Ground Ground to be left open
LVDS In LVDS In
Data Input #2, inverted Data Input #2, non- inverted Ground Ground
LVCMOS In
LVDS In LVDS In
Data Input #3, inverted Data Input #3, non- inverted Ground Ground to be left open 65 66 67 VEE VEE LE LVCMOS In
High=laser diode array is active Low=switches laser diode array off This input has an internal pull-down resistor to ensure laser safety switch off in case of unconnected -RESET input Ground Ground Laser ENABLE. High active. High=laser array is on if -LE is also active. Low=laser array is off. This input can be used for connection with an Open Fiber Control (OFC) circuit to enable IEC class 1 links. Has an internal pull-up, therefore can be left open. Laser ENABLE. Low active. Low=laser array is on if LE is also active. This input can be used for connection with an Open Fiber Control (OFC) circuit to enable IEC class 1 links. Has an internal pulldown, therefore can be left open. to be left open to be left open to be left open Power supply voltage of laser driver
LVDS In LVDS In LVDS In LVDS In
Data Input #4, inverted Data Input #4, non- inverted Ground Data Input #5, inverted Data Input #5, non- inverted Ground Ground
LVDS In LVDS In
Data Input #6, inverted Data Input #6, non- inverted Ground Ground
68
-LE
LVDS In LVDS In
Data Input #7, inverted Data Input #7, non- inverted Ground Ground 69 70 71 72 t.b.l.o. t.b.l.o. t.b.l.o. VCC
LVDS In LVDS In
Data Input #8, inverted Data Input #8, non- inverted Ground Ground Ground
LVDS In LVDS In
Data Input #9, inverted Data Input #9, non- inverted to be left open Ground Ground
LVDS In LVDS In
Data Input #10, inverted Data Input #10, non- inverted Ground Ground
LVDS In LVDS In
Data Input #11, inverted Data Input #11, non- inverted Ground Ground
LVDS In LVDS In
Data Input #12, inverted Data Input #12, non- inverted
Fiber Optics 4
V23814/15-U1306-M130 Parallel Optical Link: PAROLITM Tx/Rx AC, 1.6 Gbit/s
DESCRIPTION Receiver V23815-U1306-M130 The PAROLI receiver module converts parallel optical input signals into parallel electrical output signals. The optical signals received are converted into voltage signals by PIN diodes, transimpedance amplifiers, and gain amplifiers. All output data signals are Low Voltage Differential Signals (LVDS). The data rate is 250-1600 Mbit/s for each channel. Optical input data should be DC balanced within 144 bits. The maximum time interval of consecutive 0's and 1's (run length) should not exceed 72 bits. This will ensure that the output jitter values given for the transmitter and receiver in this data sheet will be met. Otherwise, jitter values might be exceeded. Additional Signal Detect outputs (SD1 active high / SD12 active low) show whether an optical AC input signal is present at data input 1 and/or 12. The signal detect circuit can be disabled with a logic low at ENSD. The disabled signal detect circuit will permanently generate an active level at Signal Detect outputs, even if there is insufficient signal input. This could be used for test purposes. A logic low at LVDS Output Enable sets all data outputs to logic low. SD outputs will not be effected. All nondata signals have LVCMOS levels. Transmission delay of the PAROLI system is at a maximum 1 s for the transmitter, 1 s for the receiver and approximately 5 ns per meter for the fiber optic cable. Figure 3. Receiver block diagram
Optical Input 12 Data
Pin Diode Array 12 Amplifier 12 12 Data out Electrical Outputs
TECHNICAL DATA Recommended Operating Conditions
Parameter Power Supply Voltage Noise on Power Supply(1) Noise on Power Supply(2) Differential LVDS Termination Impedance LVCMOS Input High Voltage LVCMOS Input Low Voltage LVCMOS Input Rise/Fall Time(3) Optical Input Rise/Fall Time(4) Input Extinction Ratio Input Center Wavelength
Notes Voltages refer to VEE=0 V. 1. Noise frequency: 1 kHz to 1 MHz. 2. Noise frequency: 1 MHz to 1 GHz. 3. Measured between 0.8 V and 2.0 V. 4. 20%-80% level.
Symbol VCC NPS1 NPS2 Rt
Min 3.0
Max 3.6 10 100
Units V mV V
80
120 VCC 0.8 20 400
VLVCMOSIH 2.0 VLVCMOSIL VEE tR, tF tR, tF ER C 5.0 820
ns ps dB
860
nm
Receiver Electro-Optical Characteristics
Parameter Supply Current Power Consumption LVDS Output Low Voltage(1,4) LVDS Output High Voltage(1,4) LVDS Output Differential Voltage(1, 2, 4) LVDS Output Offset Voltage(1, 3, 4) Symbol lCC P VLVDSOL VLVDSOH 925 1475 250 400 Min. Typ. Max. 250 0.8 350 1.3 Units mA W mV
Gain Amplifier Signal Detect Circuit
LVDS Output Stage
SD1 -SD12
|VOD|
ENSD
LVDS Output Enable
VOS
1125
1275 400 400 ps mV
LVDS Rise/Fall Time(5) tR, tF LVCMOS Output ILVCMOSOL Voltage Low LVCMOS Output Voltage High LVCMOS Input Current High/Low LVCMOS Output(8) Current High LVCMOS Output(9) Current Low Random Jitter(6, 7) (14) Deterministic Jitter(6) Channel-to-channel skew(10) ILVCMOSOH ILVCMOSI ILVCMOSOH ILVCMOSOL JR JD tCSK 2500 -500
500 0.5 4.0 0.31 0.08 75
A mA
UI
ps
Fiber Optics 5
V23814/15-U1306-M130 Parallel Optical Link: PAROLITM Tx/Rx AC, 1.6 Gbit/s
Notes 1. Level Diagram:
mV 1475
LVDS Output Enable
2.0 V 0.8 V
Data Out |VID| 925
data valid t3
data Low t4
data valid
Time
2. |VOD|=|(output voltage of non-inverted output minus output voltage of inverted output)|. 3. VOS=1/2 (output voltage of inverted output + output voltage of noninverted output). 4. LVDS output must be terminated differentially with Rt. 5. Measured between 20% and 80% level with a maximum capacitive load of 5 pF . 6. With no optical input jitter. 7 At sensitivity limit of -17 dBm at infinite ER. . .0 8. Source current 9. Sink current 10.With input channel-to-channel skew 0 ps.
Parameter Signal Detect Deassert Time Signal Detect Assert Time LVDS Output Enable off Delay Time LVDS Output Enable on Delay Time
Symbol t1 t2 t3 t4
Max. 10
Units s
20
ns
Receiver Pin Description
Pin# 1 Typ. Max. Units 1600 Mbit/s 2 3 4 5 -18.0 Pin Name VEE VCC1 VCC2 t.b.l.o. -RESET Level/Logic Description Ground Power supply voltage of preamplifier Power supply voltage of analog circuitry to be left open LVCMOS In High=normal operation Low=sets all Data Outputs to low This input has an internal pull-up resistor which pulls to high level when this input is left open LVCMOS Out Signal Dectect on fiber #1. High=signal of sufficient AC power is present on fiber #1 Low=signal on fiber #1 is insufficient Power supply voltage of digital circuitry Ground to be left open Ground Ground Ground LVDS Out LVDS Out Data Output #1, non-inverted Data Output #1, inverted Ground Ground LVDS Out LVDS Out Data Output #2, non-inverted Data Output #2, inverted Ground Ground LVDS Out LVDS Out Data Output #3, non-inverted Data Output #3, inverted
Parameter Data Rate Per Channel(1) Sensitivity (Average Power)(2) Saturation (Average Power)(2) Signal Detect Assert Level(3) Signal Detect Deassert Level(3) Signal Detect Hysteresis(3) Return Loss of Receiver
Notes
Symbol Min. DR PIN PSAT PSDA PSDD PSDA- PSDD ARL -26.0 1.0 12 -6.0 250
-17.0 dBm
2.5
4.0
dB
6
SD1
Optical parameters valid for each channel. 1. Optical input data should be DC balanced within 100 ns. Maximum time interval of consecutive '0's and '1's (run length) should not exceed 50 ns. 2. Measured with a DC balanced pattern (within 144 bits) with a maximum run length of 72 bits. BER=10 -12. Extinction ratio=infinite. 3. PSDA: Average optical power when SD switches from unactive to active. PSDD: Average optical power when SD switches from active to unactive.
7 8 9 10 11 12 13 14 15 16
VCC3 VEE t.b.l.o. VEE VEE VEE DO01P DO01N VEE VEE DO02P DO02N VEE VEE DO03P DO03N
Figure 4. Timing diagram
Data Out 1, 12 t1 Signal Detect 1 t2
17 18 19
Signal Detect 12
20 21 22
Fiber Optics 6
V23814/15-U1306-M130 Parallel Optical Link: PAROLITM Tx/Rx AC, 1.6 Gbit/s
Pin# 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66
Pin Name VEE VEE t.b.l.o. DO04P DO04N VEE DO05P DO05N VEE VEE DO06P DO06N VEE VEE DO07P DO07N VEE VEE DO08P DO08N VEE VEE VEE DO09P DO09N t.b.l.o. VEE VEE DO10P DO10N VEE VEE DO11P DO11N VEE VEE DO12P DO12N VEE VEE VEE t.b.l.o. VEE VCC3
Level/Logic Description Ground Ground to be left open LVDS Out LVDS Out LVDS Out LVDS Out Data Output #4, non-inverted Data Output #4, inverted Ground Data Output #5, non-inverted Data Output #5, inverted Ground Ground LVDS Out LVDS Out Data Output #6, non-inverted Data Output #6, inverted Ground Ground LVDS Out LVDS Out Data Output #7, non-inverted Data Output #7, inverted Ground Ground LVDS Out LVDS Out Data Output #8, non-inverted Data Output #8, inverted Ground Ground Ground LVDS Out LVDS Out Data Output #9, non-inverted Data Output #9, inverted to be left open Ground Ground LVDS Out LVDS Out Data Output #10, non-inverted Data Output #10, inverted Ground Ground LVDS Out LVDS Out Data Output #11, non-inverted Data Output #11, inverted Ground Ground LVDS Out LVDS Out Data Output #12, non-inverted Data Output #12, inverted Ground Ground Ground to be left open Ground Power supply voltage of digital circuitry
Pin# 67
Pin Name -SD12
Level/Logic Description LVCMOS Out low active Signal Detect on fiber #12 Low=signal of sufficient AC power is present on fiber #12 High=signal on fiber #12 is insufficient
68
ENSD
LVCMOS In High=SD1 and SD12 function enabled Low=SD1 and SD12 are set to permanent active.Internal pullup pulls to high level when input is left open. to be left open Power supply voltage of LVDS outputs Power supply voltage of amplifier Ground
69 70 71 72
t.b.l.o. VCC2 VCC1 VEE
Optical Port Designed for Infineon Simplex MT Connector (SMC) * Port outside dimensions: 15.4 mm x 6.8 mm (width x height) * MT compatible fiber spacing (250 m) and alignment pin spacing (4600 m) * Alignment pins fixed in module port * Integrated mechanical keying * process plug (SMC dimensions) included with every module * cleaning of port and connector interfaces necessary prior to mating Features of Infineon Simplex MT Connector (SMC) (as part of optional PAROLI fiber optic cables) * Uses standardized MT ferrule * MT compatible fiber spacing (250 m) and alignment pin spacing (4600 m) * Snap-in mechanism * Ferrule bearing spring loaded * Not strain-relieved * Integrated mechanical keying Cleaning and Soldering Process for Transmitter and Receiver Special care must be taken to remove residuals from the soldering and washing process, which can impact the mechanical function. Avoid the use of aggressive organic solvents like ketones, ethers, etc. Consult the supplier of the PAROLI modules and the supplier of the solder paste and flux for recommended cleaning solvents. The following common cleaning solvents will not affect the module: deionized water, ethanol, and isopropyl alcohol. Airdrying is recommended to a maximum temperature of 100C. Do not use ultrasonics. During soldering, heat must be applied to the leads only, to ensure that the case temperature never exceeds 100C. The module must be mounted with a hot-bar soldering process using a SnPb solder type, e.g.. S-Sn63Pb37E, in accordance with ISO 9435.
V23814/15-U1306-M130 Parallel Optical Link: PAROLITM Tx/Rx AC, 1.6 Gbit/s 7
Fiber Optics
Figure 5. Numbering convention
Pin 28 Pin 29 Pin 1
Figure 7. Recommended footprint: transmitter Dimensions in mm (inches)
(18) .709
Fiber 1 Fiber 12
Top View
Pin 44
Pin 45
Pin 72
Top View (13.5) .531 (0.2) A B .008 A B (20.1) .08.004
Figure 6. Recommended footprint: receiver Dimensions in mm (inches)
(18) .709
(15.4) .606 (3.5) .138 (22.7) .894
Top View (13.5) .531 (0.2) A B .008 A B (20.1) .08.004
(7).276
(15.4) .606 (3.5) .138 (22.7) .894
(33.89) 1.334 .55) (0.65 = 17 .0256=.691
1
72
27x 29 44
(7).276
28
Detail Y
45
(1.64) .065
B
(33.89) 1.334 .55) (0.65 = 17 27x .0256=.691
15 x A
1
72
(0.65 = 9.75) .0256=.691
(14.9) .587 (18.7) .736
Detail Y
29
44
(1.64) .065
Dashed lines show module outline and board space required for SMC plug. No electronic components on customer PCB within this area.
28
B A
(0.65 = 9.75) 15 x .0256=.691 (14.9) .587 (18.7) .736
45
Figure 8. Mounting hole, Detail Y
(2.575) .1014 (1.80.05) .071.002 72x 29
Dashed lines show module outline and board space required for SMC plug. No electronic components on customer PCB within this area.
(2.775) .0109
28
(0.05) M A B .002 M A B
(0.05) M A B .002 M A B
(2.55+0.03/-0) 0.100+.001/-0 4x
(0.35+0.05/-0) .014+.002/-0 72x
(0.05) M A B .002 M A B
dashed lines show module outlines
Fiber Optics 8
V23814/15-U1306-M130 Parallel Optical Link: PAROLITM Tx/Rx AC, 1.6 Gbit/s
Figure 9. Applications
LVDS PAROLI LD Tx SMC Port
Link Controller
Rx PD Ribbon Cable
Board-to-Board
Passive Optical Backplane
PAROLI Tx Rx SMC Port Ribbon Cable Backplane Connector I/O Board Optical Feed Through
Backplane
PAROLI LD SMC Port SMC Port PD
Tx LVDS
Ribbon Cable
Rx LVDS
Point-to-Point
Published by Infineon Technologies AG
Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your Infineon Technologies offices. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
(c) Infineon Technologies AG 1999 All Rights Reserved
Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologiesis an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact the Infineon Technologies offices or our Infineon Technologies Representatives worldwide - see our webpage at www.infineon.com/fiberoptics
Infineon Technologies AG * Fiber Optics * Wernerwerkdamm 16 * Berlin D-13623, Germany Infineon Technologies, Inc. * Fiber Optics * 19000 Homestead Road * Cupertino, CA 95014 USA Siemens K.K. * Fiber Optics * Takanawa Park Tower * 20-14, Higashi-Gotanda, 3-chome, Shinagawa-ku * Tokyo 141, Japan

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